Electronic Design

How to Design Very Wide Loop BW High-Performance PLL Frequency Synthesizers (Part 1)

This is Part 1 of a three-part series. As modern wireless communications systems (mainly superheterodyne radio transceivers) are now required to deliver higher performance than ever before, they’re ...
EDN

PLL design kit features timing models, GDSII physical views

A new design kit enables system-on-chip (SoC) developers to efficiently incorporate clocking IP into their designs with full support for layout, simulation, and timing closure. Perceptia Devices, an ...
EDN

The CS4350 PLL DAC Simplifies System Design

Typical Digital to Analog Converters (DACs) require a high-speed Master Clock to clock their digital filters and modulators, as well as some portions of their discrete time analog circuitry. This ...
Electronic Design

Low-Power PLL Targets Short-Range Automotive/Industrial Radar Apps

This article is part of the TechXchange: Automotive Radar. The primary goal of using radar in the automotive industry is to facilitate object detection for cars. Simple continuous-wave radar devices ...